China Net: Military and Special Supercomputer Centers

Andrey Molyakov

doi:doi:10.11648/j.jeee.20190704.12

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China Net: Military and Special Supercomputer Centers

Andrey Molyakov

Published in Journal of Electrical and Electronic Engineering (Volume 7, Issue 4)

Received: 18 August 2019 Accepted: 23 September 2019 Published: 9 October 2019

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Abstract

Author describes military and special supercomputer centers and networks by example CT-2. Work on highly productive and promising SC with a globally addressable memory and multi-thread architecture is carried out within the framework of the CT-2 project. The eponymous supercomputer belongs to the class of strategic supercomputers. The code name used is CT-2 (full name Qin Tao -2) - this is the idiom in the Chinese name “The main project in the interests of special studies of military intelligence of the Ministry of Defense of China”. Due to using of massive multi-thread streaming architecture increased tolerance to delays in performing operations with memory and the network, effectively support working with program models in the form of static graphs of data flows. Because of this, it will successfully cope with the processing in real time of multiple data streams and work effectively through a single address space with a huge memory capacity of several tens of petabytes, even in the mode of intensive irregular work with it, it will have exceptional fault tolerance and availability. The amount of available memory for the user program is 32PB, the physical memory is 64PB, which is done for hot standby. According to information received in 2011, the initially massive multi-thread microprocessor CT-2 with asynchronous threads for information systems has also become hybrid, it has enhanced numerical processing power - SIMD operations on short vectors have been introduced, as well as elements of modern graphic processors in the form of synchronous threads.

Published in	Journal of Electrical and Electronic Engineering (Volume 7, Issue 4) This article belongs to the Special Issue Science Innovation
DOI	10.11648/j.jeee.20190704.12
Page(s)	95-100
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2019. Published by Science Publishing Group

Keywords

Massive Mult-ithread, CT-2, Information Security, Supercomputer, Security Descriptor

References

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[3]	P. Kogge et al. ExaScale Computing Study: Technology Challenges in Achiving Exascale Systems. DARPA IPTO, US Air Force Research Laboratory, September 28, 2008, 278 pp.
[4]	Molyakov, А. S. New Multilevel Architecture of Secured Supercomputers/A. S. Molyakov//Current Trends in Computer Sciences & Applications 1 (3) – 2019. – PP. 57-59. – ISSN: 2643-6744 – https://lupinepublishers.com/computer-science-journal/special-issue/CTCSA.MS.ID.000112.pdf. – DOI: 10.32474/CTCSA.2019.01.000112.
[5]	Molyakov, A. S. Technological Methods Analysis in the Field of Exaflops Supercomputers Development Approaching/A. S. Molyakov, L. K. Eisymont//Global Journal of Computer Science and Technology: Information & Technology. – 2017. – № 1 (17). – РР. 37-44.
[6]	Molyakov, A. S. A Prototype Computer with Non-von Neumann Architecture Based on Strategic Domestic J7 Microprocessor/A. S. Molyakov//Automatic Control and Computer Sciences. – 2016. – № 50 (8). – РР. 682-686.
[7]	Rao A. et al. Effect of Grammar on Security of Long Passwords. CODASPY’13, February 18-20, 2013, 8 pp.
[8]	Archana A., Kohila N. Probabilistic Context-Free Grammar (PCFG) Wiser Password Cracking Techniques. International Journal of Research in Computer Applications and Robotics, February 2016, vol. 4, Issue 2, p. 1-6.
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[12]	Meeta Srivastav, Xu Guo, Sian Huang, Denesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont. Design and Benchmarking of an ASIC with Five SHA-3 Finalist Candidates. Center for Embedded Systems for Critical Applications (CESCA), USA, April 20, 2012, 27 pp.
[13]	Xu Guo, Meeta Srivastav, Sian Huang, Denesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont. ASIC Implementations of Five SHA-3 Finalists. 2012, 6 pp.
[14]	Patrice Guillet, Enrico Pargaetzi, Martin Zoller. Silicon Implementation of Second-Round SHA-3 Candidates. February 2010, Swiss Federal Institute of Technology Zurich, Integrated System Laboratory, 2010, 46 pp.
[15]	Frank K. Gurkaynak, Kris Gaj, Beat Muheim, Ekawat Homsirikamol, Christoph Keller, Marcin Rogawski, Hubert Kaeslin, Jens-Peter Kaps. Lessons Learned from Designing a 65nm ASIC for Third Round SHA-3 Candidates. ETH Zurich - George Mason University, 22-23 March 2012, 65 slides.

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APA Style

Andrey Molyakov. (2019). China Net: Military and Special Supercomputer Centers. Journal of Electrical and Electronic Engineering, 7(4), 95-100. https://doi.org/10.11648/j.jeee.20190704.12

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ACS Style

Andrey Molyakov. China Net: Military and Special Supercomputer Centers. J. Electr. Electron. Eng. 2019, 7(4), 95-100. doi: 10.11648/j.jeee.20190704.12

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AMA Style

Andrey Molyakov. China Net: Military and Special Supercomputer Centers. J Electr Electron Eng. 2019;7(4):95-100. doi: 10.11648/j.jeee.20190704.12

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@article{10.11648/j.jeee.20190704.12,
  author = {Andrey Molyakov},
  title = {China Net: Military and Special Supercomputer Centers},
  journal = {Journal of Electrical and Electronic Engineering},
  volume = {7},
  number = {4},
  pages = {95-100},
  doi = {10.11648/j.jeee.20190704.12},
  url = {https://doi.org/10.11648/j.jeee.20190704.12},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.20190704.12},
  abstract = {Author describes military and special supercomputer centers and networks by example CT-2. Work on highly productive and promising SC with a globally addressable memory and multi-thread architecture is carried out within the framework of the CT-2 project. The eponymous supercomputer belongs to the class of strategic supercomputers. The code name used is CT-2 (full name Qin Tao -2) - this is the idiom in the Chinese name “The main project in the interests of special studies of military intelligence of the Ministry of Defense of China”. Due to using of massive multi-thread streaming architecture increased tolerance to delays in performing operations with memory and the network, effectively support working with program models in the form of static graphs of data flows. Because of this, it will successfully cope with the processing in real time of multiple data streams and work effectively through a single address space with a huge memory capacity of several tens of petabytes, even in the mode of intensive irregular work with it, it will have exceptional fault tolerance and availability. The amount of available memory for the user program is 32PB, the physical memory is 64PB, which is done for hot standby. According to information received in 2011, the initially massive multi-thread microprocessor CT-2 with asynchronous threads for information systems has also become hybrid, it has enhanced numerical processing power - SIMD operations on short vectors have been introduced, as well as elements of modern graphic processors in the form of synchronous threads.},
 year = {2019}
}

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TY  - JOUR
T1  - China Net: Military and Special Supercomputer Centers
AU  - Andrey Molyakov
Y1  - 2019/10/09
PY  - 2019
N1  - https://doi.org/10.11648/j.jeee.20190704.12
DO  - 10.11648/j.jeee.20190704.12
T2  - Journal of Electrical and Electronic Engineering
JF  - Journal of Electrical and Electronic Engineering
JO  - Journal of Electrical and Electronic Engineering
SP  - 95
EP  - 100
PB  - Science Publishing Group
SN  - 2329-1605
UR  - https://doi.org/10.11648/j.jeee.20190704.12
AB  - Author describes military and special supercomputer centers and networks by example CT-2. Work on highly productive and promising SC with a globally addressable memory and multi-thread architecture is carried out within the framework of the CT-2 project. The eponymous supercomputer belongs to the class of strategic supercomputers. The code name used is CT-2 (full name Qin Tao -2) - this is the idiom in the Chinese name “The main project in the interests of special studies of military intelligence of the Ministry of Defense of China”. Due to using of massive multi-thread streaming architecture increased tolerance to delays in performing operations with memory and the network, effectively support working with program models in the form of static graphs of data flows. Because of this, it will successfully cope with the processing in real time of multiple data streams and work effectively through a single address space with a huge memory capacity of several tens of petabytes, even in the mode of intensive irregular work with it, it will have exceptional fault tolerance and availability. The amount of available memory for the user program is 32PB, the physical memory is 64PB, which is done for hot standby. According to information received in 2011, the initially massive multi-thread microprocessor CT-2 with asynchronous threads for information systems has also become hybrid, it has enhanced numerical processing power - SIMD operations on short vectors have been introduced, as well as elements of modern graphic processors in the form of synchronous threads.
VL  - 7
IS  - 4
ER  -

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Author Information

Andrey Molyakov

Institute of Information Technologies and Cybersecurity, Russian State University for the Humanities, Moscow, Russia

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Plain Text BibTeX RIS

APA Style

Andrey Molyakov. (2019). China Net: Military and Special Supercomputer Centers. Journal of Electrical and Electronic Engineering, 7(4), 95-100. https://doi.org/10.11648/j.jeee.20190704.12

Copy | Download

ACS Style

Andrey Molyakov. China Net: Military and Special Supercomputer Centers. J. Electr. Electron. Eng. 2019, 7(4), 95-100. doi: 10.11648/j.jeee.20190704.12

Copy | Download

AMA Style

Andrey Molyakov. China Net: Military and Special Supercomputer Centers. J Electr Electron Eng. 2019;7(4):95-100. doi: 10.11648/j.jeee.20190704.12

Copy | Download

@article{10.11648/j.jeee.20190704.12,
  author = {Andrey Molyakov},
  title = {China Net: Military and Special Supercomputer Centers},
  journal = {Journal of Electrical and Electronic Engineering},
  volume = {7},
  number = {4},
  pages = {95-100},
  doi = {10.11648/j.jeee.20190704.12},
  url = {https://doi.org/10.11648/j.jeee.20190704.12},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.20190704.12},
  abstract = {Author describes military and special supercomputer centers and networks by example CT-2. Work on highly productive and promising SC with a globally addressable memory and multi-thread architecture is carried out within the framework of the CT-2 project. The eponymous supercomputer belongs to the class of strategic supercomputers. The code name used is CT-2 (full name Qin Tao -2) - this is the idiom in the Chinese name “The main project in the interests of special studies of military intelligence of the Ministry of Defense of China”. Due to using of massive multi-thread streaming architecture increased tolerance to delays in performing operations with memory and the network, effectively support working with program models in the form of static graphs of data flows. Because of this, it will successfully cope with the processing in real time of multiple data streams and work effectively through a single address space with a huge memory capacity of several tens of petabytes, even in the mode of intensive irregular work with it, it will have exceptional fault tolerance and availability. The amount of available memory for the user program is 32PB, the physical memory is 64PB, which is done for hot standby. According to information received in 2011, the initially massive multi-thread microprocessor CT-2 with asynchronous threads for information systems has also become hybrid, it has enhanced numerical processing power - SIMD operations on short vectors have been introduced, as well as elements of modern graphic processors in the form of synchronous threads.},
 year = {2019}
}

Copy | Download

TY  - JOUR
T1  - China Net: Military and Special Supercomputer Centers
AU  - Andrey Molyakov
Y1  - 2019/10/09
PY  - 2019
N1  - https://doi.org/10.11648/j.jeee.20190704.12
DO  - 10.11648/j.jeee.20190704.12
T2  - Journal of Electrical and Electronic Engineering
JF  - Journal of Electrical and Electronic Engineering
JO  - Journal of Electrical and Electronic Engineering
SP  - 95
EP  - 100
PB  - Science Publishing Group
SN  - 2329-1605
UR  - https://doi.org/10.11648/j.jeee.20190704.12
AB  - Author describes military and special supercomputer centers and networks by example CT-2. Work on highly productive and promising SC with a globally addressable memory and multi-thread architecture is carried out within the framework of the CT-2 project. The eponymous supercomputer belongs to the class of strategic supercomputers. The code name used is CT-2 (full name Qin Tao -2) - this is the idiom in the Chinese name “The main project in the interests of special studies of military intelligence of the Ministry of Defense of China”. Due to using of massive multi-thread streaming architecture increased tolerance to delays in performing operations with memory and the network, effectively support working with program models in the form of static graphs of data flows. Because of this, it will successfully cope with the processing in real time of multiple data streams and work effectively through a single address space with a huge memory capacity of several tens of petabytes, even in the mode of intensive irregular work with it, it will have exceptional fault tolerance and availability. The amount of available memory for the user program is 32PB, the physical memory is 64PB, which is done for hot standby. According to information received in 2011, the initially massive multi-thread microprocessor CT-2 with asynchronous threads for information systems has also become hybrid, it has enhanced numerical processing power - SIMD operations on short vectors have been introduced, as well as elements of modern graphic processors in the form of synchronous threads.
VL  - 7
IS  - 4
ER  -

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